Discover Scan Path Discovery

The alternative for hours of manual labor tracing signal routes

Faced with a schematic of a new printed circuit board (PCB) hundreds of pages long and with little or no access to the design team that generated it, the test engineer asked to compile a electronic description of the design’s scan path is confronted with hours or days of intense manual labor tracing signal routes from one page of the schematic to the next. Fortunately for ScanWorks users, there is an alternative in Scan Path Discovery which automates the entire process.

Described in an Application Note that’s available on the Maintenance Benefits page of the ScanWorks support web site, Scan Path Discovery automatically identifies the boundary scan devices that make up the scan chain in a design. It first uses JTAG’s Test Mode Select (TMS) signal to identify the boundary-scan devices in the design. Then, it follows  the boundary-scan Test Data In (TDI) and Test Data Out) signals to determine the order of the devices on the scan chain. 

Scan Path Discovery

As the scan path is identified, Scan Path Discovery automatically associates a BSDL (Boundary Scan Description Language) file with each JTAG device on the scan path, or it asks the test engineer to assign a BSDL file to a device. The output of Scan Path Discovery is a ScanWorks description of the design and its scan path as well as a graphical view in block diagram form of the scan path. With a visual block diagram of the scan path an engineer can easily verify the order of the devices on the path. Assuming a valid scan path is discovered, Scan Path Discovery also outputs a Scan Path Verification test that can be applied to a prototype of the design immediately.

Note that an alternative method to Scan Path Discovery can be more appropriate when the engineer has little confidence that the PCB’s scan path has been correctly designed. If the scan path is not designed correctly, Scan Path Discovery can not follow the JTAG signals and identify the scan path. In these cases and when the design features only a few JTAG devices or the schematic already provides a clear and accurate block diagram of the scan path, ScanWorks’ Design Wizard is a more appropriate tool.

Getting Started

Compiling a model for all the devices in a design would require significant effort and time. Fortunately, ASSET has assembled model libraries... Before Scan Path Discovery can begin processing it must have access to information about the design. Specifically, it must have a netlist of the design, models of both boundary-scan devices, which are described by BSDL files, and non-JTAG devices. Non-boundary-scan device models are often referred to as cluster models. Other information is provided directly by the user. The netlist should identify all of the components in the design and the connections between them. It should also indicate the power and ground signals so pullup and pulldown resistors can be pinpointed. The device models that are used by Scan Path Discovery contain information like the input/output (I/O) characteristics of the devices’ pins and various relationships between input and output pins.

Compiling a model for all of the devices in a design would require significant effort and time. Fortunately, ASSET has assembled model libraries of both boundary-scan devices and non-JTAG components.

For Scan Path Discovery to begin processing, it must first know where the scan path begins; that is, where the JTAG Test Access Port (TAP) connector is located on the PCB. If this information is not obvious from the defaults in the design, Scan Path Discovery typically queries the engineer and he will provide the net names of the primary TAP signals at the point where ScanWorks will be connected to the PCB.

Scan Path Discovery will examine the components in the design and determine whether a device model is available. If a model is available, it will be automatically associated with the component in the design. If no model is found, Scan Path Discovery asks the engineer to provide one or assign a model in the library to the device in the design.

Streamlining the Process

The “Using Scan Path Discovery” application note has several useful tips for getting the most out of Scan Path Discovery. For example, the scanpathdiscovery.INI file provides setup information with default net names for boundary scan’s TDI, TDO, and TMS signals, and a default connector reference designator letter. If the TAP signal names in the design’s netlist match the names specified in the scanpathdiscovery.INI file, Scan Path Discovery uses those nets and does not have to query the engineer for the primary paths.

The application note also suggests that organizations compile their own library of device models that are frequently deployed in their designs. In addition, if the names of the BSDL files and cluster models match the names found in the netlist, Scan Path Discovery can quickly match models with components in the design with its AutoMatch feature.

For more information…

If you’re already on a maintenance contract with ASSET and want to review the “Using Scan Path Discovery” application note, access it through the Maintenance Benefits option in ScanWorks.

If you’re not on a maintenance contract and would like to know more about the many benefits associated with ongoing maintenance, contact us.

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